View UPD168102_290819.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

DATA SHEET
MOS INTEGRATED CIRCUIT
PD168102
MONOLITHIC 6-CHANNEL H BRIDGE DRIVER
DESCRIPTION
The PD168102 is a monolithic 6-channel H bridge driver IC consisting of a CMOS controller and a MOS output stage. Because it uses a MOS process, this driver IC consumes less current and loses less voltage at the output stage than conventional driver ICs that use bipolar transistors. consumption during circuit operation can be significantly reduced. Of the six output channels, four channels are voltage drive type and two channels are current drive type (voltage drive is also possible). The current drive method of the PD168102 is the output chopping method, which realizes lower power consumption drive than the conventional high-power-dissipation linear drive method. The PD168102 is housed in a 48-pin WQFN to decrease the mounting area and height. The PD168102 can simultaneously drive two stepper motors and two DC motors and is ideal for the motor driver of digital still cameras. In addition, the PD168102 employs P-channel MOSFETs in its output stage, eliminating the need for an on-chip the charge pump circuit. Therefore, the current
FEATURES
Six H bridge circuits employing power MOSFETs Voltage drive type: 4 channels, current drive type (constant current chopping type): 2 channels Low current consumption due to elimination of charge pump circuit Input logic frequency: 100 kHz supported 3 V power supply supported Minimum operating supply voltage: 2.5 V Low voltage malfunction prevention circuit Internal circuit shutdown at VDD < 2.5 V On-chip overheat protection circuit 48-pin WQFN (7 mm x 7 mm)
ORDERING INFORMATION
Part Number Package 48-pin plastic WQFN (7 mm x 7 mm)
PD168102K9-5B4
The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability and additional information.
Document No. S15301EJ1V0DS00 (1st edition) Date Published April 2002 N CP(K) Printed in Japan
(c)
2002
PD168102
PIN FUNCTIONS
Package: 48-pin WQFN (7 mm x 7 mm)
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Pin Name BRKsel VDD PGND OUT1B VM1 OUT1A PGND OUT2B VM2 OUT2A PGND DGND ISEN5 CL5 VM5 OUT5B RF5 OUT5A VM5 VM6 OUT6B RF6 OUT6A VM6 CL6 ISEN6 PGND OUT3A VM3 OUT3B PGND OUT4A VM4 OUT4B PGND VIsel IN12 IN11 IN10 IN9 IN8 IN7 IN6 IN5 IN4 IN3 IN2 IN1 Pin Function Stop mode switching pin when output open Control block power supply pin Output GND pin Ch 1 output pin Ch 1 output block power supply pin Ch 1 output pin Output block GND pin Ch 2 output pin Ch 2 output block power supply pin Ch 2 output pin Output block GND pin Control block GND pin Ch 5 current sense signal input pin Ch 5 reference voltage input pin Ch 5 output block power supply pin Ch 5 output pin Ch 5 sense resistor connection pin Ch 5 output pin Ch 5 output block power supply pin Ch 6 output block power supply pin Ch 6 output pin Ch 6 sense resistor connection pin Ch 6 output pin Ch 6 output block power supply pin Ch 6 reference voltage input pin Ch 6 current sense signal input pin Output block GND pin Ch 3 output pin Ch 3 output block power supply pin Ch 3 output pin Output block GND pin Ch 4 output pin Ch 4 output block power supply pin Ch 4 output pin Output block GND pin Voltage/current control switching pin (ch 5, ch 6) Ch 6 input pin Ch 6 input pin Ch 5 input pin Ch 5 input pin Ch 4 input pin Ch 4 input pin Ch 3 input pin Ch 3 input pin Ch 2 input pin Ch 2 input pin Ch 1 input pin Ch 1 input pin
Caution Multiple pins with the same function must all be connected.
2
Data Sheet S15301EJ1V0DS
PD168102
BLOCK DIAGRAM
IN1 48 IN2 47 IN3 46 IN4 45 IN5 44 IN6 43 IN7 42 IN8 41 IN9 40 IN10 39 IN11 38 IN12 37
BRKsel
1 Ch 1 controller Ch 2 controller Ch 3 controller Ch 4 controller Ch 5 controller Ch 6 controller
36 35 34
VIsel PGND OUT4B
VDD PGND
2 3
OUT1B VM1
4 5 Ch 1 H bridge circuit Ch 4 H bridge circuit
33 32
VM4 OUT4A
OUT1A PGND
6 7 Ch 3 H bridge circuit TSD CMP5 Ch 6 controller CMP6 UVLO
31 30
PGND OUT3B
OUT2B VM2
8 9 Ch 2 H bridge circuit
Ch 5 controller
29 28
VM3 OUT3A
OUT1A
10
27
PGND
PGND DGND
11 12 Ch 5 H bridge circuit Ch 6 H bridge circuit
26 25
ISEN6 CL6
13 ISEN5
14 CL6
15 VM5
16 OUT5B
17 RF5
18 OUT5A
19 VM5
20 VM6
21 OUT6B
22 RF6
23 OUT6A
24 VM6
Caution Multiple pins with the same function must all be connected. The motor power supply pins VM1 and VM2, and VM3 and VM4 are internally connected, so be sure to apply the same potential to them.
Data Sheet S15301EJ1V0DS
3
PD168102
EXAMPLE OF STANDARD CONNECTION
CPU
IN1 48
IN2 47
IN3 46
IN4 45
IN5 44
IN6 43
IN7 42
IN8 41
IN9 40
IN10 39
IN11 38
IN12 37
10 F
BRKsel 1 Ch 1 controller Ch 2 controller Ch 3 controller Ch 4 controller Ch 5 controller Ch 6 controller 36 35 34 VIsel PGND OUT4B
Reg
3V
VDD PGND 2 3
OUT1B VM1
4 5 Ch 1 H bridge circuit Ch 4 H bridge circuit
33 32
VM4 OUT4A
OUT1A PGND
6 7 Ch 3 H bridge circuit TSD CMP5 Ch 6 controller CMP6 UVLO
31 30
PGND OUT3B
M
M
OUT2B VM2
8 9 Ch 2 H bridge circuit
Ch 5 controller
29 28
VM3 OUT3A
OUT1A
10
27
PGND
PGND DGND
11 12 Ch 5 H bridge circuit Ch 6 H bridge circuit
26 25
ISEN6 CL6
13 ISEN5
14 CL6
15 VM5
16 OUT5B
17 RF5
18 OUT5A
19 VM5
20 VM6
21 OUT6B
22 RF6
23 OUT6A
24 VM6
22 F
2.7 V to 5.5 V
330 pF
1 k
1.5
1.5
1 k
330 pF
M
M
This circuit diagram is shown as an example of connection, and is not intended for mass production design.
4
Data Sheet S15301EJ1V0DS
PD168102
FUNCTION OPERATION TABLE
The logic of each channel is shown in the table below. I/O Truth Table for Channels 1 to 6
Input VIsel IN1, 3, 5, 7, 9, 11 L L H H H L L H H IN2, 4, 6, 8, 10, 12 L H L H L H L H OUTA Output OUTB Output Status Operating Mode of Ch 5 and Ch 6
L
Z L H L Z L H L
Z H L L Z H L L
Stopped (output open, standby) Reverse (OUTB OUTA) Forward (OUTA OUTB) Stopped (short brake) Stopped (output open) Reverse (OUTB OUTA) Forward (OUTA OUTB) Stopped (short brake)
Voltage control output
Constant current chopping
H: High level, L: Low level, Z: High impedance Constant current chopping is possible for channels 5 and 6. When VIsel is set to high level, if the voltage becomes higher than the reference voltage (external input) and the current becomes higher than the current set by the feedback resistor, the output can be forcibly chopped. When VIsel is set to low level, channels 5 and 6 function in the same way as channels 1 to 4. Standby function The PD168102 realizes a standby function by combining the input signals. By setting all the control input signals of channels 1 to 6 to low level, a standby mode in which the current consumption of the internal circuit is suppressed is entered. Note that the output status is high impedance (output open). BRKsel pin function By using the logic of BRKsel, whether the function that prevents the motor power supply rising in the Hi-Z output status (input L, L) is enabled or disabled can be selected. Refer to the truth table below. BRKsel Truth Table
BRKsel L H Hi-Z status Regenerates output current using an internal channel. An internal timer is incorporated, through which the regeneration period is set for approx. 1 ms, and then the Hi-Z status is entered. Function
Data Sheet S15301EJ1V0DS
5
PD168102
ABSOLUTE MAXIMUM RATINGS (TA = 25C: MOUNTED ON GLASS EPOXY BOARD 100 mm x 100 mm x 1 mm, COPPER FILM AREA: 15%)
Parameter Supply voltage Symbol VDD VM Input voltage Output pin voltage VIN VOUT Ch 1 to ch 4 Ch 5, ch 6 DC output current 1 (ch 1 to ch 4) DC output current 2 (ch 5, ch 6) Instantaneous output current 1 (ch 1 to ch 4) Instantaneous output current 2 (ch 5, ch 6) Power consumption Peak junction temperature Storage temperature ID(DC)1 ID(DC)2 ID(pulse)1 ID(pulse)2 PT TCH(MAX) Tstg DC DC PW < 10 ms, duty 20% PW < 10 ms, duty 20% Control block Motor block Conditions Ratings -0.5 to +6.0 -0.5 to +6.0 -0.5 to VDD+0.5 6.2 5.7 0.3 0.5 0.6 1.0 1.0 150 -55 to +150 A/ch A/ch A/ch A/ch W C C V V Unit V
RECOMMENDED OPERATING CONDITIONS (TA = 25C: MOUNTED ON GLASS EPOXY BOARD 100 mm x 100 mm x 1 mm, COPPER FILM AREA: 15%)
Parameter Supply voltage Symbol VDD VM Input voltage VIN1 VIN2 DC output current 1 (ch 1 to ch 4) DC output current 2 (ch 5, ch 6) Instantaneous output current 1 (ch 1 to ch 4) Instantaneous output current 2 (ch 5, ch 6) Logic input frequency Operating temperature range Peak junction temperature ID(DC)1 ID(DC)2 ID(pulse)1 ID(pulse)2 fIN TA TCH(MAX) -10 CL pin DC DC PW < 10 ms, duty 20% PW < 10 ms, duty 20% Conditions Control block Motor block MIN. 2.5 2.7 0 0.1 -0.2 -0.4 -0.4 -0.8 TYP. MAX. 5.5 5.5 VDD 0.5 +0.2 +0.4 +0.4 +0.8 100 85 125 Unit V V V V A/ch A/ch A/ch A/ch kHz C C
6
Data Sheet S15301EJ1V0DS
PD168102
ELECTRICAL SPECIFICATIONS (Unless otherwise specified, VDD = VM = 3 V, TA = 25C)
Parameter VDD pin current in standby mode VDD pin current when operating Input current, high Input current, low Input pull-down resistor Input voltage, high Input voltage, low H bridge on-resistance 1 (ch 1 to ch 4) H bridge on-resistance 2 (ch 5, ch 6) Symbol IDD(STB) IDD(ACT) IIH IIL RIND VIH VIL RON1 RON2 2.5 V VDD 5.5 V 2.5 V VDD 5.5 V IM = 0.2 A, sum of the top and bottom stages IM = 0.4 A, RF5, RF6 = 0 V, sum of the top and bottom stages Per VM pin, VM = 5.5 V, all control pins are low level VCL = 0.1 V -10 1.5 1.0 VIN = VDD VIN = 0 -1.0 50 0.7 x VDD 0.3 x VDD 2.0 1.5 200 Conditions MIN. TYP. MAX. 1.0 1.0 60 Unit
A
mA
A A
k V V
Output leakage current Current detection comparator offset voltage Detection voltage at low voltage Output turn-on time Output turn-off time All-off time at mode change Rise time Fall time Current detection comparator operation delay time
IM(OFF) VCO VDDS tON tOFF tHIZ tr tf tCDL
10 10 2.5
A
mV V
RM = 20 , see Figure 1
0.7 0.2 50
2.0 0.5
s s
ns
RM = 20 , see Figure 1
0.3 0.1
s s
1.0
VCL = 0.1 V, VISEN = 0 V 0.2 V, see Figure 2
0.4
s
The overheat protection circuit operates at Tch > 150C. In the overheat protected status, all outputs are high impedance. In the standby mode, the overheat protection circuit and the low-voltage malfunction prevention circuit do not operate.
Data Sheet S15301EJ1V0DS
7
PD168102
SWITCHING CHARACTERISTICS WAVEFORMS
Figure 1. H Bridge Switching Waveform (1) IN2 = Low level
100 % 90 % VIN1 10 % tON tr 90 % IOUT Hi-Z 10 % 10 % Hi-Z tOFF OUT1AOUT1B 90 % tf
(2) IN2 = High level
100 % 90 % VIN1 10 % tOFF OUT1BOUT1A 90 % IOUT 10 % brake 10 % tf tON tr OUT1BOUT1A 90 %
A high impedance period of approx. 50 ns is secured to prevent through current when switching the mode. Figure 2. Current Detection Comparator Switching Waveform
0.2 V 50 % VCL 0% 0% 50 % VISEN tCDL tCDL 100 % 0V 0.1 V
ID
50 %
50 %
0%
8
Data Sheet S15301EJ1V0DS
PD168102
TOTAL POWER DISSIPATION AND OPERATING AMBIENT TEMPERATURE CHARACTERISTICS
PT vs. TA characteristics 1.4 When mounted on 100 mm x 100 mm x 1.0 mm glass epoxy board 1.2 25C
1.0 W Total power dissipation PT (W) 1.0
125C/W 0.8
0.6
0.4
0.2 85C 0 -20 0 25 50 75 100 125 150
Operating ambient temperature TA (C)
Remark When the operating ambient temperature is 25C or lower, power application up to 1 W is possible. When the operating ambient temperature is higher than 25C, perform derating in accordance with the above figure. In addition, when at 85C (operating ambient temperature recommended condition), power application up to 0.52 W is possible.
Data Sheet S15301EJ1V0DS
9
PD168102
CHARACTERISTICS CURVES
IDD vs. VDD characteristics (VM = 3.0 V, TA = 25C) 1 4 IDD vs. TA characteristics (VDD = 5.5 V, VM = 3.0 V)
0.8
VDD pin current IDD ( A) VDD pin current IDD ( A)
3
0.6
2
0.4 When operating 0.2 During standby 0 2 4 6
1 When operating 0 -20 During standby 0 20 40 60 80 100
Supply voltage VDD (V)
Operating ambient temperature TA (C)
VIH, VIL vs. VDD characteristics (VM = 3.0 V, TA = 25C) 5
High/low-level input voltage VIH, VIL (V) High/low-level input voltage VIH, VIL (V)
VIH, VIL vs. TA characteristics (VDD = 5.5 V, VM = 3.0 V) 5
4
4 VIH 3 VIL 2
3 VIH 2 VIL
1
1
0 0 2 4 6 Supply voltage VDD (V)
0 -20
0
20
40
60
80
100
Operating ambient temperature TA (C)
RON1 (ch 1 to ch 4) vs. VM characteristics (VDD = 3.0 V, TA = 25C) 2
H bridge on-resistance RON1 () H bridge on-resistance RON1 ()
RON1 (ch 1 to ch 4) vs. TA characteristics (VDD = 3.0 V, VM 5.5 V) 2
1.5
1.5
1
1
0.5
0.5
0 0 2 4 6 Motor supply voltage VM (V)
0 -40
0
20
40
60
80
100
Operating ambient temperature TA (C)
10
Data Sheet S15301EJ1V0DS
PD168102
CHARACTERISTICS CURVES
RON2 (ch 5, ch 6) vs. VM characteristics (VDD = 3.0 V, TA = 25C) 2 RON2 (ch 5, ch 6) vs. TA characteristics (VDD = 3.0 V, VM = 5.5 V) 3
H bridge on resistance RON2 ()
H bridge on resistance RON2 ()
2 4 6
1.5
1.5
1
1
0.5
0.5
0
0 -20
0
20
40
60
80
100
Motor supply voltage VM (V)
Operating ambient temperature TA (C)
RIND vs. TA characteristics (VDD = VM = 3.0 V) 150 2
VDDS vs. TA characteristics (VDD = VM = 3.0 V)
Detection voltage at low voltage VDDS (V)
Input pull-down resistance RIND (k)
1.5
100
1
50
0.5
0 -20
0
20
40
60
80
100
0 -20
0
20
40
60
80
100
Operating ambient temperature TA (C)
Operating ambient temperature TA (C)
tON, tOFF vs. VM characteristics (VM = 2.5 V, TA = 25C) 2 1
tON, tOFF vs. VDD characteristics (VM = 2.7 V, TA = 25C)
Output turn on/off time tON, tOFF (s)
1.5 tON 1
Output turn on/off time tON, tOFF (s)
1.5 tON
1
0.5 tOFF 0 0 2 4 60
0.5 tOFF 0 2 4 6
Motor supply voltage VM (V)
Supply voltage VDD (V)
Data Sheet S15301EJ1V0DS
11
PD168102
CHARACTERISTICS CURVES
tr, tf vs. VM characteristics (VDD = 2.5V, TA = 25C) 1 1
tr, tf vs. VDD characteristics (VM = 2.7 V, TA = 25C)
0.8
0.8
Rise/fall time tr, tf ( s)
0.6
Rise/fall time tr, tf ( s)
0.6
0.4 tr 0.2 tf
0.4
tr
0.2 tf 0 4 6 0 2 4 6
0
2
Motor supply voltage VM (V)
Supply voltage VDD (V)
12
Data Sheet S15301EJ1V0DS
PD168102
PACKAGE DRAWING
48-PIN PLASTIC WQFN (7x7)
HD D D /2 HD /2 4-C0.5 A A2 detail of P part
E
/2
36 37
25 24
c
HE
E
HE /2
S
48 1
13 12 x4 f SAB
A1 terminal section c2 c1 S x4
y
S
ZE ZD y1 S P
B
t
SAB
b1 b
ITEM D MILLIMETERS 6.75 6.75 0.20 7.00 7.00 0.20 0.67 +0.08 -0.04 0.03 +0.02 -0.025 0.64 0.230.05 0.200.03 0.17 0.140.16 0.140.20 0.50 0.400.10 0.05 0.08 0.10 0.625 0.625 P48K9-50-5B4
A
E f HD HE t A A1 A2
0.08MIN. b 0.08MIN.
NOTE "t" and "f" excludes mold flash
e x
M
Lp SAB
b b1 c c1 c2 e Lp x y y1 ZD ZE
Data Sheet S15301EJ1V0DS
13
PD168102
RECOMMENDED SOLDERING CONDITIONS
The PD168102 should be soldered and mounted under the following recommended conditions. For details of the recommended soldering conditions, refer to the document Semiconductor Device Mounting Technology Manual (C10535E). For soldering methods and conditions other than those recommended below, contact an NEC sales representative. Surface Mounting Type Soldering Conditions
Soldering Method Soldering Conditions Recommended Condition Symbol IR60-103-3
Infrared reflow
Package peak temperature: 260C, Time: 60 seconds max. (at 220C or higher), Count: Three times or less, Exposure limit: 3 daysNote (after that, prebake at 125C for 10 hours), Flux: Rosin-based flux with low chlorine content (chlorine 0.2 Wt% or below) is recommended
Note
After opening the dry pack, store it at 25C or less and 65% RH or less for the allowable storage period.
Caution Do not use different soldering methods together (except for partial heating).
14
Data Sheet S15301EJ1V0DS
PD168102
NOTES FOR CMOS DEVICES
1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. Environmental control must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using insulators that easily build static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work bench and floor should be grounded. The operator should be grounded using wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with semiconductor devices on it. 2 HANDLING OF UNUSED INPUT PINS FOR CMOS Note: No connection for CMOS device inputs can be cause of malfunction. If no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND with a resistor, if it is considered to have a possibility of being an output pin. All handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 STATUS BEFORE INITIALIZATION OF MOS DEVICES Note: Power-on does not necessarily define initial status of MOS device. Production process of MOS does not define the initial operation status of the device. Immediately after the power source is turned ON, the devices with reset function have not yet been initialized. Hence, power-on does not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the reset signal is received. Reset operation must be executed immediately after power-on for devices having reset function.
Data Sheet S15301EJ1V0DS
15
3'
* The information in this document is current as of February, 2002. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC's data sheets or data books, etc., for the most up-to-date specifications of NEC semiconductor products. Not all products and/or types are available in every country. Please check with an NEC sales representative for availability and additional information. * No part of this document may be copied or reproduced in any form or by any means without prior written consent of NEC. NEC assumes no responsibility for any errors that may appear in this document. * NEC does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of NEC semiconductor products listed in this document or any other liability arising from the use of such products. No license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC or others. * Descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. The incorporation of these circuits, software and information in the design of customer's equipment shall be done under the full responsibility of customer. NEC assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. * While NEC endeavours to enhance the quality, reliability and safety of NEC semiconductor products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. To minimize risks of damage to property or injury (including death) to persons arising from defects in NEC semiconductor products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment, and anti-failure features. * NEC semiconductor products are classified into the following three quality grades: "Standard", "Special" and "Specific". The "Specific" quality grade applies only to semiconductor products developed based on a customer-designated "quality assurance program" for a specific application. The recommended applications of a semiconductor product depend on its quality grade, as indicated below. Customers must check the quality grade of each semiconductor product before using it in a particular application. "Standard": Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots "Special": Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) "Specific": Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. The quality grade of NEC semiconductor products is "Standard" unless otherwise expressly specified in NEC's data sheets or data books, etc. If customers wish to use NEC semiconductor products in applications not intended by NEC, they must contact an NEC sales representative in advance to determine NEC's willingness to support a given application. (Note) (1) "NEC" as used in this statement means NEC Corporation and also includes its majority-owned subsidiaries. (2) "NEC semiconductor products" means any semiconductor product developed or manufactured by or for NEC (as defined above).
M8E 00. 4

▲Up To Search▲

Price & Availability of UPD168102

	To Download UPD168102 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .